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BackLICD, alter alt-textify to handle weaker (<6v) signals Clock out socket, with option to send to 16-pin cable when nothing is plugged into the space of 5 out_working_increment = working_increment * 4 / 5; out_row_2 = out_working_increment*1 + out_row_1; out_row_6 = out_working_increment*5 + out_row_1; out_row_5 = out_working_increment*4 + out_row_1; out_row_3 = working_increment*2 + row_1; row_4 = row_3 + vertical_space/7; row_3 = working_increment*2 + row_1; row_5 = row_4 + vertical_space/7; cv_in_1a = [left_col, row_2, 0]; fm_lvl = [h_margin+working_width/8, row_2, 0]; fm_lvl = [h_margin+working_width/8, row_2, 0]; fm_in = [h_margin+working_width/8, row_3, 0]; cv_in_2b = [right_col, row_2, 0]; f_tune = [width_mm/2 - h_margin, top_row, 0]; f_tune = [second_col, second_row, 0]; //Third row interface placement saw_out .
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