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BackPad (CP-16-22, http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_16_22.pdf LFCSP, 16 Pin (https://www.ti.com/lit/ds/symlink/tpa6132a2.pdf#page=24), generated with kicad-footprint-generator ipc_gullwing_generator.py TSSOP, 36 Pin (JEDEC MO-153 Var JD https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_noLead_generator.py DFN6 3*3 MM, 0.95 PITCH; http://www.ti.com/lit/ds/symlink/lmr62421.pdf 8-Lead Plastic DFN (3mm x 3mm) (see Linear Technology DFN_14_05-08-1708.pdf DFN14, 4x4, 0.5P; CASE 506CN (see ON Semiconductor 122BX.PDF 32-Lead Plastic DFN (3mm x 2mm) (see Linear Technology DFN_8_05-08-1702.pdf 8-Lead Plastic Dual Flat, No Lead Package (8E) - 4x4x0.9 mm Body [SOIC] (https://docs.broadcom.com/docs/AV02-0169EN SOIC 1.27 SSO, 7 Pin Double Sided Module Texas Instruments DSBGA BGA YZP R-XBGA-N6 Texas Instruments, DSBGA, area grid, YZT, 1.86x1.36mm, 12 Ball, 4x3 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g491re.pdf ST WLCSP-81, ST die ID 464, 2.58x3.07mm, 36 Ball, 6x6 Layout, 0.4mm Pitch, https://www.ti.com/lit/ml/mxbg419/mxbg419.pdf, https://www.ti.com/lit/ds/symlink/tmp117.pdf Texas Instruments, DSBGA, 0.9x1.9mm, 8 bump 2x4 (perimeter) array, NSMD pad definition Appendix A BGA 484 0.8 SBG485 SBV485 LFCSP, exposed pad, 4x4mm.
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