3
1
Back

20pin, exposed pad (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-87/ 12-Lead Plastic DFN (4mm x 3mm) (see Linear Technology DFN_18_05-08-1778.pdf DFN20, 6x5, 0.5P; CASE 506CN (see ON Semiconductor 506CE.PDF DD Package; 8-Lead Plastic PSOP, Exposed Die Pad (see https://www.diodes.com/assets/Datasheets/AP2204.pdf SSOP 0.50 exposed pad TSSOP, 14 Pin (https://www.st.com/resource/en/datasheet/l6491.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py SOIC, 6 Pin (https://www.nxp.com/docs/en/package-information/SOT457.pdf), generated with kicad-footprint-generator Molex Mini-Fit Jr. Power Connectors, 105310-xx06, 3 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator Mounting Hardware, inside through hole ST Morpho Connector 144 STLink AI accelerated MCU with optional wifi, https://dl.sipeed.com/MAIX/HDK/Sipeed-M1&M1W/Specifications AI Kendryte K210 RISC-V Texas Instruments DSBGA BGA YZP R-XBGA-N8 Texas Instruments, DSBGA, area grid, NSMD pad definition Appendix A BGA 238 0.5 CPG238 Spartan-7 BGA, 15x15 grid, 13x13mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=279.

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