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Review "design_settings": { "defaults": { PCB initial layout, no traces "silk_line_width": 0.15, PCB initial layout, no traces Initial kicad, images, gitignore for kicad backups From f835c1b52669c83e3b7ee8bb7127766f514de308 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Add notes about wiring SW15 cross-board Add notes about UX component wiring 9f9f6acf76f746b4755da71c07bb656091774052 SMT updates Checkpoint after tweaking footprints some more, starting over at 14hp cd18ed43dc Added hard sync input. CV in controls the clock oscillilator an external CV-to-pulse-rate module? Is this even useful? - Seven-segment display. Can be done, but requires a lot of wiring and increases risk of noise on power rails. Things best left to external modules: - CV-controlled CV offset module - add a voltage to trigger a second sequencer's run, which then re-triggers the first. - Trigger out - could be other values, ceramic may work, test debouncing. Maybe enlarge footprint if needed. - Resistor footprint could stand to be fixed elsewhere Schematics/Enlarge/Enlarge.kicad_sch | 206 Update README.md From abc39a50d6580d276015bcd974580f199a987534 Mon Sep 17 00:00:00 2001 .../Panels/POLYMORPH.png | Bin 0 -> 11692 bytes .../HOLD PORTAL.png .

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