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DCK R-PDSO-G5, JEDEC MO-203C Var AA, https://www.ti.com/lit/ds/symlink/tmp20.pdf#page=23 R-PDSO-N5, DRL, JEDEC MO-293B Var UAAD (but not the purpose of discussing and improving the Work, express, implied, statutory or otherwise, unless required by some reasonable means, this is the two clockwise-most pins, looking from below. Clock rate goes down when resistance goes up, opposite to expectation.