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README.md From abc39a50d6580d276015bcd974580f199a987534 Mon Sep 17 00:00:00 2001 Subject: [PATCH] PCB initial layout, no traces "silk_line_width": 0.15, PCB initial layout, no traces Fireball/Fireball.kicad_prl | 8 "active_layer_preset": "All Copper Layers", re-re-remove the mysterious extra trace f33ea6a168 Add scad for v3.2 Stuff all teh scad files in Still.

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