synth_tools

Back

Fireball/Fireball.kicad_pro Latest commits for branch schematic Merge pull request synth_mages/MK_VCO#4 24955050f1 Merge pull request 'Finish schematic, add PDF Schematics/Fireball_VCO.pdf | Bin 0 -> 171113 bytes Schematics/Luthers_VCO_schematic.pdf | Bin 0 -> 170624 bytes README.md | 4 Hardware/PCB/precadsr/potsetc.sch | 84 Hardware/PCB/precadsr/precadsr.sch | 412 Hardware/PCB/precadsr/precadsr.xml | 1656 create mode 100644 Schematics/SynthMages.pretty/Potentiometer_Alpha_RD901F-40-00D_Single_Vertical_CircularHoles_Shaft_Centered.kicad_mod create mode 100644 Hardware/PCB/precadsr/Kosmo_panel.pretty/Kosmo_Jack_Hole.kicad_mod delete mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Bourns_3296W_Vertical_screw_centered.kicad_mod delete mode 100644 Hardware/PCB/precadsr_aux_Gerbers/precadsr-F_SilkS.gbr create mode 100644 Schematics/SynthMages.pretty/PinSocket_1x03_P2.54mm_Vertical.kicad_mod create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/DIP-14_W7.62mm_Socket_LongPads.kicad_mod delete mode 100644 Panels/luther_triangle_10hp.scad create mode 100644 Hardware/Panel/precadsr_panel_al/precadsr_panel_al.pro create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/TO-92_Inline_Wide.kicad_mod delete mode 100644 Hardware/PCB/precadsr/ao_symbols.dcm create mode 100644 Hardware/Panel/precadsr_panel_al/fp-lib-table create mode 100644 Hardware/Panel/precadsr-panel/precadsr-panel-rescue.kicad_sym create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Jack_6.35mm_PJ_629HAN.kicad_mod delete mode 100644 3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin/HOLD PORTAL.png Normal file View File 3D Printing/Cases/Eurorack Modular Case/EuroRack_Case_End_Female.stl Executable file View File Thu 22 Apr 2021 10:45:56 AM EDT **Component Count:** 76 | Refs | Qty | Component | Description | Vendor | SKU | | | | | | R24, R26, R28 | 3 | 10 Schematics/Enlarge/Enlarge.kicad_pro | 143 C1 is too small for film; is film needed? - Fix R25/R1 connection One socket connection is on the Program) on a decade counter expects CLOCK to pass 1/2 of V+ (i.e. 6v) but many external clock sources cycle between 0v.

New Pull Request

Labels Milestones