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F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer B.Paste" "Notes": "Layer B.Cu" "Notes": "Layer B.Mask" "Notes": "Layer B.Mask" "Notes": "Layer B.Cu" "Notes": "Layer B.Cu" "Notes": "Layer F.Mask" "Notes": "Layer B.Paste" "Notes": "Layer B.Cu" "Notes": "Layer F.Paste" "Notes": "Layer B.Paste" "Notes": "Layer B.Cu" "Notes": "Layer F.Paste" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: merged pull request 'Finish schematic, add PDF' (#2) from schematic into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/4 Put title box in PDF export' (#4) from schematic into main ... Add jlc constraints DRC; replace order number text Fireball/Fireball_panel.kicad_pcb .

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