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5a420f07b2d4222c473ea8c0cf33ef6f8c915115 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Final revision; added custom DRC as project file new_footprints Added hard sync to schematic, laid out PCB with on-board components hard_sync traces added but maybe won't keep a704d3e530 More traces and vias, and net links 06eccf7d9c added the once through idea with commentary by 496e3e3344 Correcting changed filename in .prl gets jiggy with PCB locator, 15 Pins per row, Mounting: (http://www.molex.com/pdm_docs/sd/039281043_sd.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py SSOP24: plastic shrink small outline package; 10 leads; body width 4.4 mm; Exposed Pad [eTSSOP] (see Microchip Packaging Specification 00000049BS.pdf DFN package.

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