synth_tools

Back

Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes count 0 Minor layout tweaks merged pull request synth_mages/MK_VCO#4 merged pull request synth_mages/MK_SEQ#2 Added schmancy pcb for v1 front panel design and includes 2.5mm centerward shift for input and output jacks PSU/Synth Mages Power Word Stun Panel.kicad_pcb 4975 lines.

Schematics/schematic_bugs_v1.md dcaec240831d28b722a7d7988287c76a1461e439 more fixes PSU/Synth.
-4.726331e+000 -3.123942e+000 2.496000e+001 vertex 4.517993e+000 -5.507795e+000 9.983999e+000.
NEO 6/7/8, (https://www.u-blox.com/sites/default/files/NEO-8Q-NEO-M8-FW3_HardwareIntegrationManual_%28UBX-15029985%29_0.pdf GPS ublox NEO.
0.5 CPGA196 Artix-7 BGA, 22x22 grid, 19x19mm.

New Pull Request

Labels Milestones