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Back-7.828580e-001 4.226238e-001 facet normal 0.392071 0.262789 0.881602 facet normal -6.066731e-07 -1.000000e+00 -5.540166e-07 vertex -1.047207e+02 9.665134e+01 1.229235e+01 facet normal -6.013036e-01 -7.990207e-01 0.000000e+00 vertex -9.129413e+01 1.027282e+02 1.055000e+01 vertex -9.129413e+01 1.027282e+02 3.455000e+01 vertex -1.045318e+02 9.970655e+01 3.455000e+01 facet normal 0.995197 0.0978932 0 facet normal 4.931772e-001 8.630601e-001 1.091032e-001 vertex -5.524647e-001 -4.339742e+000 2.470218e+001 facet normal 5.094784e-14 -1.000000e+00 3.905332e-14 facet normal 0.499998 -0.866027 1.47826e-06 facet normal -0.0915932 -0.0112271 0.995733 vertex 5.17982 5.20899 6.86125 facet normal 0.0623605 -0.633165 0.771501 vertex 0 8.97218 4.79464 facet normal -0.0973868 0.995182 0.0113607 vertex -7.12884 1.0528 7.81019 facet normal -2.880153e-004 -5.040268e-004 -9.999998e-001 ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf * [How to use](Docs/use.md 96f746fa2d Final tweaks, version submitted to JLCPCB on 20240124 63579cf959 Add notes about UX component wiring 55ee65a5e9 Checkpoint after tweaking footprints some more, starting over at 14hp PCB initial layout, no traces Using the Precision ADSR build notes | C7, C12 | 3 | 2N3904 | Small Signal NPN Transistor, TO-92"/>