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Aug 7 13:39:59 2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= From a22bca6d29ddc0a54597dab4d11ad9ab7e48e3c6 Mon Sep 17 00:00:00 2001 .../Panels/FIREBALL VCO.png | Bin 11916 -> 0 bytes Binary files /dev/null and b/Datasheets/tl074.pdf differ Binary files /dev/null and b/Panels/luther_triangle_vco_quentin_v3_only_art.stl differ Binary files /dev/null and b/3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin/MIRROR IMAGE.png differ Binary files /dev/null and b/VCO_MANUAL_v2.pdf differ 500k Trimpot; tune to 1V out 10k NTC Thermistor <-- CV In - diode to prevent z-fighting. Nothing = 0.01; 3D Printing/Pot_Knobs/Moog_Cap_v2.stl Executable file Unescape Fireball/Fireball_panel.kicad_dru Normal file Unescape "Name": "Top Solder Paste.

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