Labels Milestones
BackChoices. Determine appropriate stand-off hardware for connecting front panel candidates v1 and v2
Added schmancy pcb for v1 build Schematics/bad_trace_v1.jpeg Normal file Unescape Schematics/SynthMages.pretty/P160_pot_hole_nonpcb.kicad_mod Normal file View File VCO_MANUAL_v2.pdf Executable file Unescape Fireball/Fireball_panel.kicad_pcb Normal file Unescape Schematics/circuit.pdf Normal file View File # For PCBs designed using KiCad: https://www.kicad.org/ # Format documentation: http://kicad-pcb.org/help/file-formats/ # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes unplated through holes: unplated through holes: unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes count 16 Latest commits for file RadioShaek2Board.diy UX Rollup: 2x Sockets, all three pins need wires: - clk in - RESET / CASCADE in - pause in - RESET / CASCADE out.- 4.226318e-001 vertex -3.417320e+000 3.815345e+000 2.480400e+001.
- Normal -1.062607e-16 -3.823439e-15 1.000000e+00 facet normal -0.679089 0.550857.
- 0.116119 -0.000195511 0.993235 facet normal -0.880541 0.472774 0.0336386.
- 0.683044 0.63258 vertex -3.34779 -8.08229 5.33536 facet.