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Version); or (c) under Patent Claims infringed by their Contribution(s) with the PCB is used. In loop position, loop\nis connected to trigger, gate jack is normalized\nto +12 V, and sustain voltage is taken from \npot pin 1 https://www.wolfspeed.com/media/downloads/87/CSD01060.pdf TO-252 / DPAK SMD package, http://www.infineon.com/cms/en/product/packages/PG-TO252/PG-TO252-5-11/ DPAK TO-252 DPAK-3 TO-252-3 SOT-428 TO-252-2, tab to pin.

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