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Back0]; //Fourth row interface placement triangle_out = [third_col, fourth_row, 0]; pwm_cv_lvl = [width_mm - h_margin - working_width/8, row_4, 0]; left_rib_x = thickness * 1.2; right_rib_x = width_mm - hole_dist_side, height - v_margin - title_font; saw_out = [output_column, row_1, 0]; audio_out_2 = [right_col, row_5, 0]; audio_out_1 = [right_col, row_3, 0]; manual_2 = [left_col, row_3, 0]; manual_2 = [left_col, row_1, 0]; pwm_in = [first_col, first_row, 0]; c_tune = [width_mm/2 + h_margin, top_row, 0]; left_rib_x = hole_dist_side + thickness; v_margin = hole_dist_top*2 + thickness; Experimenting with more panel layout ideas I was sufficiently shocked by the two clockwise-most pins, looking from below. Clock rate goes down when resistance goes up, opposite to expectation. Schematic fixes: Trim 5mm from vertical for both panels, to make fitting inside a case easier. Or 10mm if it faces away and so on. Use