3
1
Back

Steps, but limited by decade counter expects CLOCK to pass 1/2 of V+ (i.e. 6v) but many external clock sources cycle between 0v and 5v max // gate out (j4/j10 // clock in (j2/j11) // casc out (j14/j15 // reset/casc in (j1/j13 // gate out (j4/j10 // clock out (j5/j12 // glide atten (rv15 // glide manual (rv16 // Everything OUT goes on the GitHub page (they'll have "@ something" after them) and download them as separate sheet 2bb058d571 initial kicad project main MK_SEQ/.gitignore 3 lines Latest commits for file LICENSE 9e7b04561b Add ground fills, fix some clearance issues, make all power traces large main VCA/Schematics/Dual_VCA_with_cv2.diy 8684 lines master PSU/Synth Mages.

New Pull Request