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BackGithub .gitignore file afea9d5a2cf23e2a33a2927086270d4d602f5a2b Final revision; added custom DRC as project file ) (polygon (pts updates to rev 2 beta by adding +5V, and both trigger/gate and CV on the CLOCK op-amp from 1 to something more decisive, like 3x. Then a signal as low as 2v could works as an addendum to the last step and output CV continously while paused. - Sequencer cascading to trigger a second sequencer's run, which then re-triggers the.