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Y="0.7"/> Update luther's layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole) Total plated holes unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Not plated through holes: merged pull request 'Put title box in PDF export' (#4) from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 **Component Count:** 75 **Component Count:** 76 Docs/precadsr_layout_back.pdf Normal file View File Hardware/PCB/precadsr_Gerbers/precadsr-B_Mask.gbr Normal file View File Hardware/PCB/precadsr_aux_Gerbers/precadsr-B_Mask.gbr Normal file Unescape f33ea6a168 Go to file f6c7924538 Messing around with panel title fonts More experimentation with panel title fonts Futura BT font files Binary files /dev/null and b/Panels/FireballSpell_Large.webp differ Binary files a/Panels/futura medium condensed.

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