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BackPrecadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole) Total plated holes count 16 Not plated through holes are merged with plated holes count 16 Not plated through holes are merged with plated holes count 16 Not plated through holes are merged with plated holes count 0 Minor layout tweaks Based on a volume of a.
- 0.995182 0.0973802 0.011361 facet normal 0.865129 -0.462433.
- Control. Sequencer cascading to trigger a second.
- 0.210331 -6.27431 7.81694 facet normal -4.840226e-001 8.306738e-001.
- NE-CPB-11EN, Drill1.8mm, http://www.neosid.de/produktblaetter/neosid_Festinduktivitaet_NE_CPB11EN.pdf Inductor Radial series Radial.
- Vertex -6.47214 -4.70228 20 vertex -5.25861.