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Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-9/ Infineon PG-DSO 12 pin, exposed pad, thermal vias, http://www.ti.com/lit/ds/symlink/drv8870.pdf 20-Pin Thermally Enhanced Thin Shrink Small Outline (SO) (http://www.everlight.com/file/ProductFile/201407061745083848.pdf 5-Lead Plastic Small Outline (SO) (http://www.everlight.com/file/ProductFile/201407061745083848.pdf 5-Lead Plastic Small Outline (SO), see https://docs.broadcom.com/docs/AV02-0173EN 4-Lead Plastic Small Outline Package (MS) [MSOP] (see Microchip Packaging Specification 00000049BS.pdf DCB Package 8-Lead Plastic DFN (3mm x 3mm) (see Linear Technology DFN_16_05-08-1709.pdf DHC Package; 16-Lead Plastic HTSSOP (4.4x5x1.2mm); Thermal pad with vias; (http://www.ti.com/lit/ds/symlink/drv8800.pdf HTSSOP, 16 Pin (https://www.nxp.com/docs/en/package-information/SOT758-1.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py HTSSOP, 24 Pin (https://www.analog.com/media/en/technical-documentation/data-sheets/hmc431.pdf), generated with kicad-footprint-generator Molex Pico-Clasp series connector, B9P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator Molex CLIK-Mate.

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