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Back'Castellated pad'" condition "A.Net != B.Net" condition "A.Pad_Type == 'NPTH, mechanical' && B.Type == 'track'" ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Sat Aug 7 13:39:59 2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 ============================================================= Total unplated holes count 16 Latest commits for file Panels/FireballSpell.png Add panels Panels/FireballSpell.png | Bin 0 -> 104908 bytes Panels/title_test.scad | 22 .../precadsr_aux_Gerbers/precadsr-job.gbrjob | 2 .../Unseen Servant/Unseen Servant.kicad_pcb | 2 | 47k | Resistor | | | Tayda | A-1135 | | R15, R20, R22 | 2 Fireball/Fireball.kicad_pro | 6 Latest commits for file Fireball/Fireball.kicad_pcb tweaks layout with input from sam 52b504dd7c Delete 'Panels/futura light.
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