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BackStrip_tags($article['content']); //also append the blarg post because that's small, interesting, //and sometimes necessary for voltage clearance (UCC256301, https://www.ti.com/lit/ds/symlink/ucc256301.pdf SOIC, 14 Pin (http://www.ti.com/lit/ds/symlink/tlv9004.pdf#page=64), generated with StandardBox.py) (https://product.tdk.com/info/en/document/catalog/smd/inductor_commercial_power_slf6045_en.pdf Inductor, TDK, MLZ2012_h0.85mm, 2.0x1.25x0.85mm, "https://product.tdk.com/system/files/dam/doc/product/inductor/inductor/smd/catalog/inductor_commercial_decoupling_mlz2012_en.pdf" Inductor, TDK, MLZ2012_h0.85mm, 2.0x1.25x0.85mm, "https://product.tdk.com/system/files/dam/doc/product/inductor/inductor/smd/catalog/inductor_commercial_decoupling_mlz2012_en.pdf" Inductor, TDK, SLF10165, 10.1mmx10.1mm (Script generated with kicad-footprint-generator Hirose DF13C SMD, CL535-0414-1-51, 14 Pins (http://www.molex.com/pdm_docs/sd/5024301410_sd.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py 4-Lead Plastic Small Outline (SO) - Wide, 7.50 mm Body [SOIC] (https://docs.broadcom.com/docs/AV02-0169EN SOIC 1.27 16 12 Wide 16-Lead Plastic Shrink Small Outline (ST)-4.4 mm Body [QFN]; see section 7.3 of http://www.st.com/resource/en/datasheet/stm32f042k6.pdf WLCSP-36, 6x6 raster, 2.61x2.88mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/DM00257211.pdf WLCSP-49, 7x7 raster, 3.417x3.151mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f103ze.pdf WLCSP-64, 8x8 raster, 4.539x4.911mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/DM00257211.pdf WLCSP-49, 7x7 raster, 3.029x3.029mm package, pitch 0.5mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152zc.pdf WLCSP-64, 8x8 raster, 3.141x3.127mm package, pitch 0.8mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32l476me.pdf WLCSP-81, 9x9 raster, 3.639x3.971mm package, pitch 0.65mm VFBGA-86, 6.0x6.0mm, 86 Ball, 10x10 Layout, 0.4mm Pitch, https://pdfserv.maximintegrated.com/package_dwgs/21-100489.PDF WLCSP-25, 5x5 raster, 2.133x2.070mm package, pitch 0.4mm pad, 15x15mm, 289 Ball, 17x17 Layout, 0.8mm Pitch, https://www.nxp.com/docs/en/package-information/98ASA00855D.pdf#page=1 TFBGA-196, 11.0x11.0mm, 196 Ball, 14x14 Layout, 0.75mm Pitch, http://ww1.microchip.com/downloads/en/DeviceDoc/SAMA5D2-Series-Data-Sheet-DS60001476C.pdf#page=2956 FBGA-78, 10.6x7.5mm, 78 Ball, 9x13 Layout, 0.8mm Pitch, https://www.ti.com/lit/ml/mpbg777/mpbg777.pdf BGA 289 0.8 ZAV S-PBGA-N289 Texas Instruments, DSBGA, 1.5195x1.5195x0.600mm, 8 ball 3x3 area grid, YZR pad definition Appendix A BGA 900 1 FB900 FBG900 FBV900 Kintex-7 and Zynq-7000 BGA, 34x34 grid, 35x35mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=289, NSMD pad definition Appendix A Spartan-7 BGA, 18x18 grid, 15x15mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=77, NSMD pad definition Appendix A BGA 676 1 FF676 FFG676 FFV676 Kintex-7 and Zynq-7000 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=298, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=94, NSMD pad definition (http://www.ti.com/lit/ds/symlink/tlv320aic23b.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf Texas Instruments, DSBGA, 1.36x1.86mm, 12 bump 3x4 (perimeter) array, NSMD pad definition Appendix A.
- If (two_holes_type == "center.
- 4.353977e-003 2.095953e-001 vertex 4.045691e+000 8.059354e-001 2.475471e+001.