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40pin receptacle vertical Hirose series connector, 502386-1270 (http://www.molex.com/pdm_docs/sd/5023860270_sd.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py SSOP24: plastic shrink small outline package; 28 leads; body width 16.90 mm Power-Integrations variant of 8-lead though-hole mounted DIP package, row spacing 6.73 mm (264 mils), body size 6.7x6.64mm (see e.g. Https://www.ctscorp.com/wp-content/uploads/219.pdf), SMD, LowProfile SMD 3x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin SMD 5x-dip-switch SPST KingTek_DSHP05TS, Slide, row spacing 7.62 mm (300 mils), body size (see http://www.kingtek.net.cn/pic/201601201446313350.pdf), JPin SMD 7x-dip-switch SPST , Piano, row spacing 25.4 mm (1000 mils), Socket THT DIP DIL PDIP 2.54mm 7.62mm 300mil LowProfile 1x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils 14-lead though-hole mounted DIP package, row spacing 7.62 mm (300 mils), body size 9.78x30.12mm (see e.g. Https://www.ctscorp.com/wp-content/uploads/209-210.pdf), LowProfile 9x-dip-switch SPST , Slide, row spacing 7.62 mm (300 mils), LongPads 8-lead though-hole mounted DIP package, row spacing 15.24 mm (600 mils), http://multimedia.3m.com/mws/media/494546O/3mtm-dip-sockets-100-2-54-mm-ts0365.pdf 3M 20-pin zero insertion force socket, through-hole, row spacing 8.61 mm (338 mils), body size 6.7x16.8mm (see e.g. Https://www.ctscorp.com/wp-content/uploads/206-208.pdf E-Switch slide switch, EG series, SPDT, right angle, PTS645VL83-2 LFS C&K Button tactile switch SPST angled PTS645VL83-2 LFS C&K Button tactile switch 6mm ALPS SKHH right angle http://www.alps.com/prod/info/E/HTML/Tact/SnapIn/SKHH/SKHHLUA010.html tactile switch D Switch, single pole double throw, separate symbols"/> d12ec1f19bbae8f01395e4c76a152d3d4ce7a3d4 created pull request 'new_footprints' (#5) from new_footprints into main Merge pull request 'Fix rail clearance issues, make all power traces large "rules": { PCB initial layout, no traces "solder_mask_clearance": 0.0, PCB initial layout, no traces }, More tweaks after pro review 19116ba39d Apply jlcpcb's design rules, small fixes for those 7022ad9ddb couple more minor clearance tweaks 68726f9fe0 Delete '3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/MIRROR IMAGE.png' ec89d624dcbabc43243d2dcb7078e4434becb7c8 Delete '3D Printing/AD&D 1e spell names in.

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