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Href="https://gitea.circuitlocution.com/synth_mages/MK_VCO/commit/b11a8d31874f2e074879a668b4f6eb5f32915bd6" rel="nofollow">b11a8d31874f2e074879a668b4f6eb5f32915bd6 Change transistor footprint to inline_wide, fix DRC ground plane 56529bef3a0c7d0b31cfccd6b6ce971fb35b4e9c Updates from real TL0x4, fix pots being backwards, tighten up schematic.

• Magnetic transformer connector horizontal angled 90deg THT.
• GateMate FPGA Maxim WLP-12, W121H2+1, 2.008x1.608mm, 12.
• 2.233433e+000 1.747200e+001 facet normal -6.696355e-01 -3.723880e-03.

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