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53047-1310, 13 Pins per row (http://www.molex.com/pdm_docs/sd/1053091203_sd.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 16 Pin (http://www.intersil.com/content/dam/Intersil/documents/l16_/l16.5x5.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py Halo N5 SO, 16 Pin (https://www.st.com/resource/en/datasheet/tsv521.pdf), generated with kicad-footprint-generator Hirose DF11 through hole, vertical, https://www.tme.eu/Document/2d152ced3b7a446066e6c419d84bb460/XT60%20SPEC.pdf M8 Male connector for 1.6mm PCB's with 40 contacts (polarized Highspeed card edge card connector socket for 2.36mm PCBs, vertical, alignment pins, weld tabs, board locks (source: https://suddendocs.samtec.com/prints/hsec8-1xxx-xx-xx-dv-x-xx-footprint.pdf 0.8 mm BGA-64, 10x10 raster, 4.201x4.663mm package, pitch 0.65mm VFBGA-86, 6.0x6.0mm, 86 Ball, 10x10 Layout, 0.55mm Pitch, https://www.dialog-semiconductor.com/sites/default/files/da1469x_datasheet_3v1.pdf#page=740 VFBGA-100, 10x10, 7x7mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f446ze.pdf UFBGA-169, 13x13 raster, 7x7mm package, pitch 0.4mm; see section 7.2 of http://www.st.com/resource/en/datasheet/stm32f207vg.pdf VFBGA-49, 7x7, 5x5mm package, pitch 0.5mm; see section 7.8 of http://www.st.com/resource/en/datasheet/DM00387108.pdf Texas Instruments, DSBGA, area grid, NSMD pad definition Appendix A BGA 1156 1 FF1157 FFG1157 FFV1157 FF1158 FFG1158 FFV1158 Virtex-7 BGA, 42x42 grid, 45x45mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=289, NSMD pad definition Appendix A Virtex-7 BGA, 42x42 grid, 42.5x42.5mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=273, https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=284.

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