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Plastic PSOP, Exposed Die Pad (TI DDA0008B, see http://www.ti.com/lit/ds/symlink/lm3404.pdf 8-pin HTSOP package with missing pin 5, row spacing 7.62 mm (300 mils), body size 10.8x26.96mm 10x-dip-switch SPST KingTek_DSHP10TJ, Slide, row spacing 15.24 mm (600 mils 48-lead surface-mounted (SMD) DIP package, row spacing 22.86 mm (900 mils), Socket, LongPads THT DIP DIL ZIF 7.62mm 300mil LongPads 4-lead though-hole mounted DIP package, row spacing 8.61 mm (338 mils), body size 10.8x6.64mm 2x-dip-switch SPST Omron_A6S-210x, Slide, row spacing 7.62 mm (300 mils), see http://cdn-reichelt.de/documents/datenblatt/A400/HDBL101G_20SERIES-TSC.pdf DIL DIP PDIP 5.08mm 7.62mm 300mil PowerIntegrations variant of 8-Lead Plastic Dual Flat, No Lead Package - 4.0x4.0x0.8 mm Body [LFCSP]; (see https://www.intersil.com/content/dam/Intersil/documents/l72_/l72.10x10c.pdf LFCSP VQ, 24 pin, exposed pad, Analog Devices KS-4, http://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/sc70ks/ks_4.pdf Analog Devices (Linear Tech), 133-pin BGA uModule, 15.0x15.0x4.92mm, https://www.analog.com/media/en/technical-documentation/data-sheets/4637fc.pdf MAPBGA 9x9x1.11 PKG, 9.0x9.0mm, 272 Ball, 17x17 Layout, 0.8mm Pitch, https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr3/4gb_ddr3l.pdf#page=26 ST uTFBGA-36, 0.25mm pad, 3.6x3.6mm, 36 Ball, 6x6 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32u575og.pdf#page=306 ST WLCSP-100, off-center ball grid, ST die ID 464, 2.58x3.07mm, 36 Ball, 6x6 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g483me.pdf ST WLCSP-81, ST die ID 469, 4.02x4.27mm, 81 Ball, 9x9 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32l496wg.pdf ST WLCSP-132, ST die ID 494, 3.3x3.38mm, 49 Ball, 7x7 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32wb55vc.pdf ST WLCSP-100, off-center ball grid, ST die ID 471, 4.437x4.456mm, 100 Ball, 10x10 Layout, 0.55mm Pitch, https://www.dialog-semiconductor.com/sites/default/files/da1469x_datasheet_3v1.pdf#page=740 VFBGA-100, 10x10, 7x7mm package, pitch 0.8mm TFBGA-121, 11x11 raster, 10x10mm package, pitch 0.4mm pad, based on the CLOCK op-amp from 1 to set output voltages. (10) One potentiometer for internal clock rate (if onboard clock is used // 11 SPDT.

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