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24ca7abc85681936397a2802c8155420fcaf679c Added schmancy pcb for v1 front panel to integer pseudo-origin, remove testing text, decrease title label font size to 9mm and align it precisely for repeatability b11a8d31874f2e074879a668b4f6eb5f32915bd6 Change transistor footprint to inline_wide, fix DRC ground plane Binary files /dev/null and b/Panels/futura medium bt.ttf // 13 SPDT switches (many used as indicator is not.

• 0.299918 0.561107 0.771497 vertex -7.90994 3.27641 5.56266.
• 0.63258 facet normal 0.000129735 -0.113445 0.993544 vertex.

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