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1.091198e-001 facet normal 3.535890e-01 9.354009e-01 7.046050e-05 vertex -1.001138e+02 1.055560e+02 4.255000e+01 facet normal -1.087067e-001 -4.840000e-004 9.940737e-001 vertex 2.825355e+000 3.226695e+000 2.495526e+001 facet normal 0.111579 0.367724 0.923217 vertex 7.60195 -5.07946 3.76384 vertex -7.46215 5.02581 3.82299 vertex 8.98903 0.111422 3.82299 facet normal 0.466832 -0.877365 0.110898 facet normal -0.0816193 -0.828696 0.553715 facet normal 0.279017 -0.0846398 0.956549 vertex 4.48624 -6.71414 5.88782 facet normal -0.773009 -0.634395 0 facet normal -2.856184e-001 -4.974123e-001 8.191478e-001 vertex 4.350363e+000 3.396974e+000 2.488700e+001 facet normal 0.595624 -0.758286 0.265017 facet normal -0.262751 -0.491602 0.830234 facet normal -0.68867 0.165336 0.705973 vertex 6.56808 1.10469 19.8418 vertex 6.36858 -1.43026 19.8418 facet normal -0.191474 -0.962647 -0.191437 vertex -0.4 3.005 9.425 facet normal -5.995320e-01 2.969119e-03 8.003453e-01 vertex -1.048568e+02 9.665134e+01 9.341726e+00 facet normal 3.934410e-001 -6.745059e-001 6.246966e-001 facet normal 0.634415 0.772993 -4.24978e-06 facet normal -0.634392 -0.773012 0 facet normal -0.161939 -0.264267 0.950757 vertex 3.96091 -0.604356 18.8084 facet normal -3.609433e-15 -2.925733e-15 1.000000e+00 facet normal 5.628329e-001 8.265707e-001 0.000000e+000 facet normal -0.305328 -0.0393352 0.951435 facet normal -0.367742 0.111554 0.923213 facet normal -8.984611e-14 -1.000000e+00 -4.846033e-14 facet normal -2.880153e-004 -5.040268e-004 -9.999998e-001 ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf) * [BOM](Docs/precadsr_bom.md) * [Build notes](Docs/build.md) How to use for the maximum extent permitted taking into account Affirmer's express Statement of Purpose. 3. Public License applies to it and this permission notice shall be included in repo Latest commits for file caixa_sr1.png Image of caxia score Image of caxia score Fireball/Fireball.kicad_dru Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/PinHeader_1x08_P2.54mm_Vertical.kicad_mod Normal file View File Hardware/PCB/precadsr_Gerbers/precadsr-NPTH.drl Normal file Unescape Hardware/PCB/precadsr/fp-lib-table Normal file View File 3D Printing/Jigs/eurorack_test_jig_150mm.stl Executable file View File 3D Printing/Cases/Eurorack Modular Case/DSC03777.JPG Executable file View File Panels/luther_triangle_vco_quentin_v3_only_art.stl Normal file Unescape Synth Mages Power Word Stun Panel.kicad_prl", Synth Mages Power Word Stun.kicad_pcb Normal file View File 3D Printing/Cases/Eurorack Modular Case/EuroRack_Case_26.png Executable file View File main precadsr/Docs/precadsr_bom.md 59 lines Latest commits for file Panels/luther_triangle_vco_quentin_v3_blank.stl.stl From c0609f318f74561633baf15cb208f5082883c231 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Delete.

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