Labels Milestones
Back2537badf2888da8d57706bf8be36ba8f10d4993a gets comfier with gitignore and git rm --cache 19116ba39d Apply jlcpcb's design rules, small fixes for those main synth_tools/PSU/PSU.md 5 lines 1e09530d97 Delete '3D Printing/Panels/image.png' 6523065365 Go to file f63cfba954 Embiggen traces, add teardrops updated C5 footprint & tracing; schematic annotation updated C5 footprint & tracing; schematic annotation 6523065365 updates the potentiometer pads and thermal vias; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f303r8.pdf WLCSP-49, 7x7 raster, 2.965x2.965mm package, pitch 0.5mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32f446ze.pdf UFBGA-144, 12x12 raster, 7x7mm package, pitch 0.8mm; see section 7.2 of http://www.st.com/resource/en/datasheet/stm32f207vg.pdf VFBGA-49, 7x7, 5x5mm package, pitch 0.4mm; see section 7.3 of http://www.st.com/resource/en/datasheet/stm32f042k6.pdf WLCSP-36, 6x6.
- DPDT non single coil latching, https://content.kemet.com/datasheets/KEM_R7002_EC2_EE2.pdf.
- 1.815339e-01 -6.805394e-03 9.833611e-01 vertex -1.076894e+02 9.695134e+01.