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Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 ============================================================= Total unplated holes count 16 Latest commits for file Schematics/SynthMages.pretty/P160_pot_hole_nonpcb.kicad_mod ttrss-plugin- _comics/init.php 468 lines elseif (strpos($article["link"], "satwcomic.com/") !== FALSE) .

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