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-1.27 106.172 (grid_origin 121.92 119.38 "Notes": "Layer F.SilkS" "Notes": "Layer B.Cu" "Notes": "Layer B.Mask" "Notes": "Layer F.Mask" "Notes": "Layer B.Paste" "Notes": "Layer B.Paste" "Notes": "Layer B.Cu" "Notes": "Layer F.SilkS" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.Paste" "Notes": "Layer F.Mask" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 5.1.10-88a1d61d58~90~ubuntu20.04.1} date Thu Aug 12 11:11:04 2021 ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole) Total plated holes count 16 Not plated through holes: merged pull request 'More schematics' (#3) from schematic into main ... Add jlc constraints DRC; replace order number text Fireball/Fireball_panel.kicad_pcb | 3 | AudioJack2 | Audio Jack, 2 Poles (Mono / TS), Switched T Pole (Normalling.

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