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BackDrill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes unplated through holes: ============================================================= 2bd01a1ff2d30ca3cff647bbf3b80645437cc07c Add schematic, start on PCB with on-board components hard_sync traces added but maybe won't keep From 52a9fa26f6a6a8c4f7e3fc085f8b6ccdd7541277 Mon Sep.
- 0.995171 0.0981585 0 vertex -2.5.
- -4.781967e-001 -8.392519e-001 2.588131e-001 vertex.
- Width 7.5mm, pitch 7.5mm size 37.5x11mm^2.