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BackLayer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes are merged with plated holes unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole Total plated holes Total unplated holes count 16 Not plated through holes are merged with plated holes count 16 Not plated through holes are merged with plated holes unplated through holes: ============================================================= From a22bca6d29ddc0a54597dab4d11ad9ab7e48e3c6 Mon Sep 17 00:00:00 2001 Subject: [PATCH 01/13] initial notes for v1.
- -1.076659e+02 9.665134e+01 5.903821e+00 facet normal -0 -0.956942 -0.29028.
- Hardware/Panel/precadsr_panel_al/precadsr_panel_al.kicad_pcb Normal file Unescape DEF Kosmo_panel_Ground_point_for_NPTH.