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Back# Additional ignored # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: unplated through holes: ============================================================= d9153c70802a10d2fe554f80f1a497b409aac630 sr1 531ebcae92ad8ad00635060e3583259ee13cc12b Add html test version 5ff3077e8252367b7eceb0b21b0803904b695d42 Fix sr2 blue 9060b76361734f9abf9a1c676dd9110e9ced917b initial kicad project .../OttosIrresistableDance.kicad_pcb | 2 | 1N5817 | Schottky diode | | Tayda | A-1135 | | R31 | 1 | Conn_01x10 | Pin socket, 2.54 mm, 1x7 | | D1, D2 | 2 | 1N5817 | Schottky diode | | Tayda | A-804 | | Tayda | A-001 | | | | | | R17, R19 | 3 | AudioJack2 | Audio Jack, 2 Poles (Mono / TS *(optional) SIP socket, 2.54 mm, 1x4 | | | C2, C5, C6, C8, C9 | 1 | AudioJack2_SwitchT | Audio Jack, 2 Poles (Mono / TS), Switched T Pole (Normalling)"/>