Labels Milestones
BackLeft pins from below Clock POT is too small for film; is film needed? - Smaller cap (476nF?) for C1 - Ceramic 104s for C10, C14, might be fine, might introduce intermittents - Don't put R8 so close to R26 -- D36/R47 too close Testing before powering up: Clock In - ~27K.
- GateMate FPGA Maxim WLP-12, W121H2+1, 2.008x1.608mm.
- 0.225362 0.544079 0.808201 vertex 6.07199 0 19.1916.
- Width 5.3 mm; (see.