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BackTemp_* # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes count 16 Latest commits for file Schematics/SynthMages.pretty/IDC-Header_2x05_P2.54mm_Vertical_Fixed_Ground_Fill.kicad_mod Fix annoyance of 2x05 IDC header THT 1x10 1.00mm single row Through hole vertical IDC header THT 1x37 1.00mm single row style1 pin1 left Surface mounted pin header THT 2x08 2.00mm double row Through hole angled pin header, 2x10, 2.54mm pitch, double cols (from Kicad 4.0.7!), script generated Through hole pin header THT 1x14 1.00mm single row style1 pin1 left Surface mounted socket strip THT 2x30 1.27mm double row Through hole pin header THT 1x36 1.00mm single row male, vertical entry Harwin LTek Connector, 18 pins, single row style2 pin1 right Through hole angled pin header, 2x40, 1.00mm pitch, double cols (from Kicad 4.0.7), script generated Surface.
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