X="0.5" y="0.7"/> Update luther's layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes are merged with plated holes count 16 Not plated through holes: unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file View File Panels/futura medium condensed bt.ttf' Delete 'Panels/futura medium condensed bt.ttf' Delete 'Panels/futura medium bt.ttf' 4d5fa6d903 Delete 'Panels/futura medium bt.ttf' Panels/futura light bt.ttf create mode 100644 Hardware/Panel/precadsr_panel_al/sym-lib-table create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/D_DO-41_SOD81_P7.62mm_Horizontal.kicad_mod create mode 100644 Hardware/PCB/precadsr/Kosmo_panel.pretty/fastestenv_Pot_Hole.kicad_mod create mode 160000 Hardware/lib/aoKicad create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/Potentiometer_Alpha_RD902F-40-00D_Dual_Vertical_CircularHoles_centered.kicad_mod delete mode.
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