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Really weird with WireIt A couple more GND-stitch vias Undo converting GND to GND_JMP and fix everything that broke 3583986e89 Finished PCB, passes all passable DRCs created pull request synth_mages/MK_VCO#2 21e2abea62 Merge pull request synth_mages/MK_VCO#4 merged pull request 'Finish schematic, add PDF 2d3c489f2a More SR1 notation 969311f00cbb6d6ece9a25b5fb1d4e2884e468c0 Assorted.

• 7.16683 7.57523 vertex 1 6.40171 12.8528 vertex.
• Normal -0.991526 -0.109206 -0.0703586 vertex 6.45862 -5.99273 11.8624.

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