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Layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= 0d3d72c49e606725216a5a9a4217e6c039d5a574 77735c00cc3285131373f5cfc61b82eab5963d12 Update README.md 2cb8e5eaf679e30139948d8744800b04487466fc updated C5 footprint & tracing; schematic annotation Add 55k-ish resistor to coarse knob to fix tuning range main ENV/Envelope/Envelope.kicad_sch 1474 lines Binary files /dev/null and b/Panels/futura light bt.ttf | Bin 11930 -> 0 bytes From b284a71188b23f9f8c43bee1fcce2820249f4384 Mon Sep 17 00:00:00 2001 Subject: [PATCH 02/18] Checkpoint after tweaking footprints some more, starting over at 14hp Added hard sync to schematic, laid out PCB with exploratory 8hp layout PSU/Synth Mages Power Word Stun.kicad_prl Synth Mages Power Word Stun.kicad_prl | 6 Fireball/Fireball.kicad_sch | 1614 main MK_SEQ/Schematics/Unseen Servant/Unseen Servant.kicad_sch From 8fe829edc2a52299443ce1d2193e2aa04d060c17 Mon Sep 17 00:00:00 2001 Subject: [PATCH] More tweaks after.

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