Ref="C9" pin="1"/> main MK_VCO/Fireball/Fireball_panel.kicad_pro 505 lines { "board": { More tweaks after pro review "design_settings": { "defaults": { PCB initial layout, no traces Initial kicad, images, gitignore for kicad backups d7370bb10c Add tl074 datasheet/pinout Datasheets/tl074-pinout.jpeg | Bin 0 -> 38024 bytes From b2f0340111348a8deafde0ffe244939fe4eeb6b7 Mon Sep 17 00:00:00 2001 Images/capsocket.png | Bin 0 -> 136810 bytes Images/captest.png | Bin 0 -> 580484 bytes .../Panels/Radio_shaek_standoff_padded_2.stl | Bin 0 -> 43300 bytes Panels/FireballSpell_Large_bw.xcf | Bin 9479 -> 14135 bytes caixa_sr2.png | Bin 0 -> 70584 bytes 3D Printing/Rails/36hp_outie.stl Normal file Unescape Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole Total plated holes unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 0 Minor layout tweaks Finish schematic, add PDF Features already done: Internal clock with manual control. - Clock in socket with 80 contacts AT ISA 16 bits Bus Edge Connector Mini-PCI Express bus connector full size with clips (https://s3.amazonaws.com/fit-iot/download/facet-cards/documents/PCI_Express_miniCard_Electromechanical_specs_rev1.2.pdf#page=24 Mini-PCI Express bus connector half size with clips (https://s3.amazonaws.com/fit-iot/download/facet-cards/documents/PCI_Express_miniCard_Electromechanical_specs_rev1.2.pdf#page=25 PCIexpress Bus Edge.