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Change page size to 9mm and align it precisely for repeatability Change transistor footprint to inline_wide, fix DRC ground plane 56529bef3a0c7d0b31cfccd6b6ce971fb35b4e9c Updates from real TL0x4s re-re-remove the mysterious extra trace 4c5e03f875a81278be4b8089dd10dd98b0c86e5d Add scad for v3.2.

• 1x33, 2.54mm pitch, double rows Through hole angled.
• -1.06427 7.92316 vertex 1.05741 -7.11568 7.9151 vertex.
• -0.0989405 0.995066 vertex 1.50007 7.86363.
• Contribution has been received by Licensor and.
• VQFN, 32 Pin (https://www.jedec.org/standards-documents/docs/mo-142-d variation CC), generated.

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