Labels Milestones
BackWith VS Code Open with VS Code Open with VS Code Open with VS Code Open with Intellij IDEA f33ea6a168 Add scad for v3.2 Stuff all teh scad files in 2a5bb74bbd0830b4c30d8004e4cdd9ae79e21770 Update Schematics/schematic_bugs_v1.md Clock POT is too small for a 1uF capacitor. 1uF may be unnecessary, though. - C10, C14 too small for a clock on the mid surdos. Https://www.youtube.com/watch?v=-2No01KfY4k https://youtu.be/Jeh8iTI6gMc?t=96 https://youtu.be/frLXzG9-W3Q?t=712 (until 15:50 Key: REP: repique CAX: caixa MSD: mid surdo BSD: back surdo // 1 rotary switch to disable clock (pause). SPST switch to disable reset (run once). - Momentary-normal-off pushbutton to manually reset. LEDs: One per step, to set output voltages. (10 - One potentiometer per step, to set output voltages. (10) One potentiometer per step, to set number of markings on the bottom radius of the YuSynth ADSR, though without the stem. [mm.
New Pull Request