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-9.778748e+01 9.171995e+01 2.655000e+01 facet normal 7.41043e-05 0.11511 0.993353 vertex -0.209414 -6.29114 7.71246 facet normal -0.547907 -0.449653 0.705415 vertex -7.91125 -5.64888 3.26879 facet normal -0.0822608 -0.0821747 0.993217 vertex 5.23616 -5.23616 6.86814 facet normal 4.496515e-001 7.868899e-001 4.226319e-001 vertex -3.382837e+000 -3.928930e+000 2.480400e+001 facet normal -0.0376859 -0.272878 0.96131 vertex -7.13321 0 6.87796 vertex 5.00497 5.09136 6.87866 vertex -5.20899 -5.17982 6.86125 facet normal 0.665684 -0.586535 0.461347 vertex -6.5979 -0.528493 7.34278 facet normal 0.877731 0.469113 0.0975757 vertex 7.48323 5.00013 0 vertex -10.1904 0 0 Y N 1 F N DEF SW_Coded_SH-7080 SW 0 40 Y N 1 F N DEF SW_DIP_x01 SW 0 40 Y Y 1 F N DEF SW_Rotary2x6 SW 0 0 Dual VCA, based roughly on Moritz Klein's work, but with buffering between (some) stages. Needs a TLC7524/AD7524 (a simple DAC that's still sorta analog) and a momentary-on button to run once - Pause CV In Latest commits for branch schematic Merge pull request 'pcb_finalization' (#1) from bugfix/10hp into main Merge pull request 'pcb_finalization' (#1) from bugfix/10hp into main ... Add jlc constraints DRC; replace order number text Add jlc.

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