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FH12-12S-0.5SH, 12 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator JST SH series connector, LY20-42P-DT1, 21 Circuits (http://www.jae.com/z-en/pdf_download_exec.cfm?param=SJ103130.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py TSSOP, 48 Pin (https://www.nxp.com/docs/en/package-information/98ASA00694D.pdf DFN8 2x2, 0.5P (https://www.onsemi.com/pub/Collateral/511AT.PDF On Semiconductor, SIP-38, 9x7mm, (https://www.onsemi.com/pub/Collateral/AX-SIP-SFEU-D.PDF#page=19 8-Lead Plastic Dual Flat, No Lead Package - 4.0x4.0x0.8 mm Body [TQFP] With 4.5x4.5 mm Exposed Pad Variation; (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot158-1_po.pdf VSO56: plastic very small outline package; 16 leads; body width 7.5 mm; (see NXP sot054_po.pdf TO-92 leads in-line, narrow, oval pads, drill 0.75mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot371-1_po.pdf STC SOP.

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