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BackENV/README.md 3 lines sym_lib_table New KiCad version; non Al panel Gerbers *~ New KiCad version; non Al panel Gerbers # Exported BOM files *.xml *.csv # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole) Total plated holes count 16 ============================================================= Total unplated holes count 16 Not plated through holes are merged with plated holes.
- Pitch 2.41x2.54mm pin-PCB-offset 9.4mm 44-pin D-Sub connector.
- Will snooth it a 40%.
- 1:1, 9.0x8.6x7.6mm (https://productfinder.pulseeng.com/products/datasheets/P663.pdf SMT Gate Drive.