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Resistors Corrected: Updated C5 and C14 with more panel layout Start of LM13700 version to see why main *-backups Forget (and ignore) fp-info-cache file as it is based on http://www.latticesemi.com/view_document?document_id=213 BGA 0.8mm 9mm 121 BGA-132 11x17 12x18mm 1.0pitch Altera BGA-144 M144 MBGA Altera BGA-153 M153 MBGA Altera BGA-153 M153 MBGA Altera UBGA U324 BGA-324 BGA-624, 25x25 grid, 21x21mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 UCBGA-49, 7x7 raster, 3.89x3.74mm package, pitch 0.8mm Altera BGA-68 M68 MBGA Altera UBGA U324 BGA-324 BGA-624, 25x25 grid, 21x21mm package, pitch 0.4mm; see section 7.2 of http://www.st.com/resource/en/datasheet/stm32f429ng.pdf UFBGA-201, 15x15 raster, 13x13mm package, 0.8mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=270, NSMD pad definition Appendix A Artix-7 BGA, 22x22 grid, 23x23mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=261, NSMD pad definition (http://www.ti.com/lit/ds/slas718g/slas718g.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments, DSBGA, area grid, NSMD pad definition Appendix A BGA 484 0.8 CLG484 CL484 CLG485 CL485 Artix-7 BGA, 16x16 grid, 17x17mm package, 0.8mm.

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