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Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes Total unplated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file View File 3D Printing/Cases/Eurorack Modular Case/DSC03778.JPG Executable file View File Panels/FireballSpell.png Executable file Unescape Schematics/SynthMages.pretty/SOCKET_3_PIN_HEADER_NORMAL.kicad_mod Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/Jack_6.35mm_PJ_629HAN.kicad_mod Normal file View File 3D Printing/Cases/Eurorack Modular Case/EuroRack_Case_24.png Executable file View File KICKDRUM_MANUAL.pdf Normal file View File 3D Printing/Cases/Eurorack Modular Case/EuroRack_Case_End_Male.stl Executable file View File Mon 10 May 2021 12:33:34 AM EDT Sat 28 Aug 2021 07:18:14 PM EDT Generated from schematic by Eeschema 5.1.9-73d0e3b20d~88~ubuntu20.04.1 Generated from schematic into main afea9d5a2cf23e2a33a2927086270d4d602f5a2b Final revision; added custom DRC as project file ) ) New KiCad version; non Al panel Gerbers ) (filled_polygon New KiCad version; non Al panel Gerbers pts New KiCad version; non Al panel Gerbers From 5a4e89eea63bf71c8fd68e1168f096dfb3459aa4 Mon Sep 17.

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