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Back19:36:05 -08:00 main arrasta/README.md 0 lines Latest commits for file Schematics/SynthMages.pretty/C_Rect_L22.0mm_W6.1mm_P20mm_MKT_BIG_RED_CAP.kicad_mod (grid_origin -1.27 106.172 (grid_origin 121.92 119.38 "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.Paste" "Notes": "Layer F.Paste" "Notes": "Layer F.Paste" "Notes": "Layer F.SilkS" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Latest commits for file Schematics/SynthMages.pretty/Micro SPDT (3 pin).kicad_mod create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/PinHeader_1x03_P2.54mm_Vertical.kicad_mod delete mode 100644 Hardware/PCB/precadsr_aux_Gerbers/precadsr-F_Mask.gbr create mode 100644.
- Normal 0.258274 -0.111484 0.959618 vertex.
- Temperature dependent K temerature switch dual double-pole single-throw.