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3.512332e-04 facet normal -9.052842e-01 2.348598e-04 -4.248064e-01 facet normal 0.205712 -0.591982 0.779256 facet normal -7.692111e-01 3.825631e-03 -6.389833e-01 vertex -1.046924e+02 9.695134e+01 1.225997e+01 facet normal -0.0980088 0.995114 -0.0119414 facet normal -2.880153e-004 -5.040268e-004 -9.999998e-001 ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf) * [BOM](Docs/precadsr_bom.md) * [Build notes](Docs/build.md ``` git clone --recurse-submodules git@gitlab.com:rsholmes/precadsr.git ``` Or if you want to socket the timing capacitors. ** Use only four (4.

Normal 0.233255 -0.849615 0.473018 facet normal -0.382424.
Fireball/Fireball_panel.kicad_pcb | 3 | A1M.

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