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F80e4975fb checkpoint before getting really weird with WireIt dd8c61c34f A couple more GND-stitch vias Latest commits for file Panels/luther_triangle_vco_quentin_v3_only_art.stl The selected branch/tag are equal. From c58f541d7e93b3fa0676ab29736db865cc42ef96 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Add '3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin/Panels/MIRROR IMAGE.png and /dev/null differ Latest commits for file Panels/10_step_seq.png Latest commits for file Examples/precadsr.pdf Binary files /dev/null and b/Docs/precadsr.pdf differ Binary files /dev/null and b/sr1_full.png differ aac0a4a5b4 Notes from debugging Clock POT is the diameter measuring 90degrees on the wrong way

Change page size to 9mm and align it precisely for repeatability Change transistor footprint to inline_wide, fix DRC ground plane 56529bef3a0c7d0b31cfccd6b6ce971fb35b4e9c Updates from real TL0x4, fix pots being backwards, tighten up schematic, fit letter instead of A4 c852e5d6ad8630143a633f6c4ffcb4d705a43337 Add note resulting from mechanical transformation.

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